Wrap Gates

A field-effect transistor (FET) also requires a gate besides the source and drain contacts. It is predicted that the vertical geometry of nanowires, which makes it possible for a gate to surround the nanowire, will lead to superior electrostatic control of the conductivity in the FET channel. However, wrap-gate formation in the lateral geometry is also possible, as recently demonstrated by Samsung [17]. The important steps in forming a vertical wrap gate are deposition of a dielectric layer followed by gate metal deposition and an etch-back process [18]. Fig. 6 shows a vertical array of nanowires fully covered in a Si3N4 dielectric, where the thick base of the nanowires indicates the length of the metal wrap gate.


Figure 6. Possible evolution of the field-effect transistor. (a) Metal-oxide-semiconductor FET (MOSFET): the planar gate affects the conducting channel from one direction. (b) FINFET: the gate surrounds the channel from all but one side. (c) Nanowire FINFET: complete, but nonuniform wrap-around gate. (d) Vertical nanowire FET: the gate has a complete, uniform wrap-around gate. (e) Vertical array of nanowires after wrap-gate formation. (Reprinted with permission from19. © 2006 Institute of Physics Publishing.)

 

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NODE WP6 Innovation: Index>Processing>Wrap gates
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Martin Magnusson